733 search results - page 95 / 147 » High performance in tree-based parallel architectures |
ECCV
2010
Springer
14 years 2 months ago
2010
Springer
This paper introduces an approach for dense 3D reconstruction from unregistered Internet-scale photo collections with about 3 million of images within the span of a day on a single...
ICDCSW
2002
IEEE
14 years 1 months ago
2002
IEEE
In the near future, there will be increasingly powerful computers in smart cards, telephones, and other information appliances. This will create a massive infrastructure composed ...
IPPS
2010
IEEE
13 years 6 months ago
2010
IEEE
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
ICPPW
2006
IEEE
14 years 2 months ago
2006
IEEE
Modulo scheduling is a major optimization of high performance compilers wherein The body of a loop is replaced by an overlapping of instructions from different iterations. Hence ...
FPL
2004
Springer
14 years 2 months ago
2004
Springer
Abstract. With the help of the FPGA technology, the boarder between hardand software has vanished. It is now possible to develop complex designs and fine grained parallel applicat...