Sciweavers

1024 search results - page 156 / 205
» High-Level Execution Time Analysis
Sort
View
ASAP
2004
IEEE
101views Hardware» more  ASAP 2004»
14 years 2 months ago
Register Organization for Enhanced On-Chip Parallelism
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
Rama Sangireddy
POPL
2010
ACM
14 years 8 months ago
Static Determination of Quantitative Resource Usage for Higher-Order Programs
We describe a new automatic static analysis for determining upper-bound functions on the use of quantitative resources for strict, higher-order, polymorphic, recursive programs de...
Steffen Jost, Hans-Wolfgang Loidl, Kevin Hammond, ...
RSA
2000
170views more  RSA 2000»
13 years 10 months ago
Delayed path coupling and generating random permutations
We analyze various stochastic processes for generating permutations almost uniformly at random in distributed and parallel systems. All our protocols are simple, elegant and are b...
Artur Czumaj, Miroslaw Kutylowski
SAS
2009
Springer
214views Formal Methods» more  SAS 2009»
14 years 11 months ago
Abstract Interpretation of FIFO Replacement
Interpretation of FIFO Replacement Daniel Grund and Jan Reineke Saarland University, Saarbr?ucken, Germany In hard real-time systems, the execution time of programs must be bounded...
Daniel Grund, Jan Reineke
SIGMETRICS
2003
ACM
199views Hardware» more  SIGMETRICS 2003»
14 years 4 months ago
Data cache locking for higher program predictability
Caches have become increasingly important with the widening gap between main memory and processor speeds. However, they are a source of unpredictability due to their characteristi...
Xavier Vera, Björn Lisper, Jingling Xue