In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
Ki-seon Cho, Jong-on Park, Jin-seok Hong, Goang-se...
Abstract— The design of robust and area efficient power distribution networks for high speed, high complexity integrated circuits has become a challenging task. The integrity of...
Abstract. Modern networks of workstations connected by Gigabit networks have the ability to run high-performance computing applications at a reasonable performance, but at a signi ...
Evangelos P. Markatos, Manolis Katevenis, Penny Va...
We introduce the Composite Endpoint Protocol (CEP) which efficiently composes a set of transmission elements to support high speed flows which exceed the capabilities of a single...
Abstract. Packet classification is a fundamental task for network devices such as edge routers, firewalls, and intrusion detection systems. Currently, most vendors use Ternary Cont...