Abstract—Input buffered switch architecture has become attractive for implementing high performance routers and expanding use of the Internet sees an increasing need for quality ...
Routers built around a single-stage crossbar and a centralized scheduler do not scale, and (in practice) do not provide the throughput guarantees that network operators need to ma...
Isaac Keslassy, Shang-Tse Chuang, Kyoungsik Yu, Da...
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...