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ASYNC
2002
IEEE
115views Hardware» more  ASYNC 2002»
13 years 12 months ago
Point to Point GALS Interconnect
Reliable, low-latency channel communication between independent clock domains may be achieved using a combination of clock pausing techniques, self-calibrating delay lines and an ...
George S. Taylor, Simon W. Moore, Robert D. Mullin...
DEXAW
2002
IEEE
79views Database» more  DEXAW 2002»
13 years 12 months ago
Understanding the Behavior of the Conflict-Rate Metric in Optimistic Peer Replication
Optimistic replication of data is a widely used tool for mobile environments, but the behavior of concurrent conflicting updates caused by the relaxed consistency model is poorly ...
An-I Wang, Peter L. Reiher, Rajive Bagrodia, Geoff...
JCS
1998
117views more  JCS 1998»
13 years 6 months ago
A Semantic-Based Transaction Processing Model for Multilevel Transactions
Multilevel transactions have been proposed for multilevel secure databases; in contrast to most proposals, such transactions allow users to read and write across multiple security...
Indrakshi Ray, Paul Ammann, Sushil Jajodia
APCCAS
2006
IEEE
227views Hardware» more  APCCAS 2006»
14 years 1 months ago
FPGA Prototyping of Spatio-temporal 2D IIR Broadband Beam Plane-wave Filters
— We propose a VLSI architecture for the single-chip realization of 2D spatio-temporal IIR digital filters, consisting of a meshed connection of concurrent identical vector-proce...
Arjuna Madanayake, Leonard T. Bruton
PVLDB
2010
139views more  PVLDB 2010»
13 years 5 months ago
Aether: A Scalable Approach to Logging
The shift to multi-core hardware brings new challenges to database systems, as the software parallelism determines performance. Even though database systems traditionally accommod...
Ryan Johnson, Ippokratis Pandis, Radu Stoica, Mano...