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» Highly pipelined asynchronous FPGAs
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DELTA
2010
IEEE
14 years 22 days ago
Notations for Multiphase Pipelines
— FPGAs, (Field-Programmable Gate Arrays) are often used for embedded image processing applications. Parallelism, and in particular pipelining, is the most suitable architecture ...
Christopher T. Johnston, Donald G. Bailey, Paul J....
ASYNC
2005
IEEE
174views Hardware» more  ASYNC 2005»
14 years 1 months ago
Delay Insensitive Encoding and Power Analysis: A Balancing Act
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...
Konrad J. Kulikowski, Ming Su, Alexander B. Smirno...
ISCAPDCS
2004
13 years 9 months ago
FG: A Framework Generator for Hiding Latency in Parallel Programs Running on Clusters
FG is a programming environment for asynchronous programs that run on clusters and fit into a pipeline framework. It enables the programmer to write a series of synchronous functi...
Thomas H. Cormen, Elena Riccio Davidson
ASYNC
2003
IEEE
119views Hardware» more  ASYNC 2003»
14 years 28 days ago
Asynchronous DRAM Design and Synthesis
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
Virantha N. Ekanayake, Rajit Manohar
TREC
2007
13 years 8 months ago
Exegy at TREC 2007 Million Query Track
Exegy’s submission for the TREC 2007 million query track consisted of results obtained by running the queries against the raw data, i.e., the data was not indexed. The hardwarea...
Naveen Singla, Ronald S. Indeck