Sciweavers

95 search results - page 11 / 19
» Hirschberg's Algorithm on a GCA and Its Parallel Hardware Im...
Sort
View
HPDC
1993
IEEE
13 years 11 months ago
Programming a Distributed System Using Shared Objects
Building the hardware for a high-performance distributed computer system is a lot easier than building its software. In this paper we describe a model for programtributed systems ...
Andrew S. Tanenbaum, Henri E. Bal, M. Frans Kaasho...
ISCAS
2003
IEEE
144views Hardware» more  ISCAS 2003»
14 years 28 days ago
A flexible global readout architecture for an analogue SIMD vision chip
A new vision chip, SCAMP-2, has been developed in a 0.35µm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architectu...
Piotr Dudek
ISVLSI
2002
IEEE
104views VLSI» more  ISVLSI 2002»
14 years 17 days ago
Scalable VLSI Architecture for GF(p) Montgomery Modular Inverse Computation
Modular inverse computation is needed in several public key cryptographic applications. In this work, we present two VLSI hardware implementations used in the calculation of Montg...
Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, &Ccedi...
CGO
2004
IEEE
13 years 11 months ago
Custom Data Layout for Memory Parallelism
In this paper, we describe a generalized approach to deriving a custom data layout in multiple memory banks for array-based computations, to facilitate high-bandwidth parallel mem...
Byoungro So, Mary W. Hall, Heidi E. Ziegler
IPPS
2005
IEEE
14 years 1 months ago
Stream PRAM
Parallel random access memory, or PRAM, is a now venerable model of parallel computation that that still retains its usefulness for the design and analysis of parallel algorithms....
Darrell R. Ulm, Michael Scherger