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ICEIS
2007
IEEE
14 years 1 months ago
Challenges in Business Process Analysis
Business process analysis ranges from model verification at design-time to the monitoring of processes at run-time. Much progress has been achieved in process verification. Today...
Wil M. P. van der Aalst
IPPS
2007
IEEE
14 years 1 months ago
Packet Reordering in Network Processors
Network processors today consists of multiple parallel processors (microengines) with support for multiple threads to exploit packet level parallelism inherent in network workload...
S. Govind, R. Govindarajan, Joy Kuri
QEST
2007
IEEE
14 years 1 months ago
Interchange Formats for Performance Models: Experimentation and Ouput
XML-based interchange formats for performance models provide a mechanism whereby performance model information may be transferred among modeling tools. For example, the PMIF allow...
Connie U. Smith, Catalina M. Lladó, Ram&oac...
SIES
2007
IEEE
14 years 1 months ago
Protocol Modelling Semantics for Embedded Systems
The properties of a domain oriented modelling approach or language are determined by the dominant semantics of the domain. A significant subclass that needs particular attention,...
Ashley T. McNeile, Ella E. Roubtsova
ATVA
2007
Springer
226views Hardware» more  ATVA 2007»
14 years 1 months ago
Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver
This paper presents a bounded model checking algorithm for the verification of analog and mixed-signal (AMS) circuits using a satisfiability modulo theories (SMT) solver. The sys...
David Walter, Scott Little, Chris J. Myers