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DAC
2012
ACM
11 years 11 months ago
WCET-centric partial instruction cache locking
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Huping Ding, Yun Liang, Tulika Mitra
CODES
2009
IEEE
14 years 3 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
SUTC
2006
IEEE
14 years 2 months ago
Detection and Repair of Software Errors in Hierarchical Sensor Networks
Abstract— Sensor networks are being increasingly deployed for collecting critical data in various applications. Once deployed, a sensor network may experience faults at the indiv...
Douglas Herbert, Yung-Hsiang Lu, Saurabh Bagchi, Z...
CODES
2006
IEEE
14 years 12 days ago
Phase guided sampling for efficient parallel application simulation
Simulating chip-multiprocessor systems (CMP) can take a long time. For single-threaded workloads, earlier work has shown the utility of phase analysis, that is identification of r...
Jeffrey Namkung, Dohyung Kim, Rajesh K. Gupta, Igo...
COOTS
1997
13 years 10 months ago
MiSFIT: A Tool for Constructing Safe Extensible C++ Systems
The boundary between application and system is becoming increasingly permeable. Extensible applications, such as web browsers, database systems, and operating systems, demonstrate...
Christopher Small