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ICFP
2012
ACM
13 years 7 months ago
Proof-producing synthesis of ML from higher-order logic
The higher-order logic found in proof assistants such as Coq and various HOL systems provides a convenient setting for the development and verification of pure functional program...
Magnus O. Myreen, Scott Owens
CODES
2008
IEEE
15 years 12 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
CASES
2005
ACM
15 years 7 months ago
Architectural support for real-time task scheduling in SMT processors
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
LCTRTS
2010
Springer
16 years 9 days ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...
COOPIS
2002
IEEE
15 years 10 months ago
Empirical Differences between COTS Middleware Scheduling Strategies
The proportion of complex distributed real-time embedded (DRE) systems made up of commercial-off-the-shelf (COTS) hardware and software is increasing significantly in response to...
Christopher D. Gill, Fred Kuhns, Douglas C. Schmid...