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» How to Transform an Analyzer into a Verifier
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HASE
1999
IEEE
13 years 11 months ago
Analyzing the Real-Time Properties of a U.S. Navy Signal Processing System
The state of the art in verifying the real-time requirements of applications developed using general processing graph models relies on simulation or off-line scheduling. We extend...
Steve Goddard, Kevin Jeffay
ICFEM
1997
Springer
13 years 11 months ago
Formally Specifying and Verifying Real-Time Systems
A real-time computer system is a system that must perform its functions within specified time bounds. These systems are generally characterized by complex interactions with the en...
Richard A. Kemmerer
ISSTA
2004
ACM
14 years 27 days ago
Verifying process models built using parameterized state machines
Software process and workflow languages are increasingly used to define loosely-coupled systems of systems. These languages focus on coordination issues such as data flow and c...
Barbara Staudt Lerner
HPDC
2010
IEEE
13 years 8 months ago
Mendel: efficiently verifying the lineage of data modified in multiple trust domains
Data is routinely created, disseminated, and processed in distributed systems that span multiple administrative domains. To maintain accountability while the data is transformed b...
Ashish Gehani, Minyoung Kim
SFP
2004
13 years 8 months ago
Calculating an exceptional machine
: In previous work we showed how to verify a compiler for a small language with exceptions. In this article we show how to calculate, as opposed to an abstract machine for this lan...
Graham Hutton, Joel Wright