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    CADE
    1998
    Springer
    137views Logical Reasoning» more  CADE 1998»
    Automated Theorem Proving in a Simple Meta-Logic for LF
    14 years 2 months ago
    Automated Theorem Proving in a Simple Meta-Logic for LF
    Download  www.cs.cmu.edu
    Abstract. Higher-order representation techniques allow elegant encodings of logics and programming languages in the logical framework LF, but unfortunately they are fundamentally i...
    Carsten Schürmann, Frank Pfenning
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    AAAI
    2008
    142views Intelligent Agents» more  AAAI 2008»
    Hyperequivalence of Logic Programs with Respect to Supported Models
    14 years 11 days ago
    Hyperequivalence of Logic Programs with Respect to Supported Models
    Download  www.cs.engr.uky.edu
    Recent research in nonmonotonic logic programming has focused on program equivalence relevant for program optimization and modular programming. So far, most results concern the st...
    Miroslaw Truszczynski, Stefan Woltran
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    HYBRID
    2010
    Springer
    168views Control Systems» more  HYBRID 2010»
    Safe compositional network sketches: formal framework
    14 years 3 months ago
    Safe compositional network sketches: formal framework
    Download  www.cs.bu.edu
    NetSketch is a tool for the specification of constrained-flow applications and the certification of desirable safety properties imposed thereon. NetSketch assists system integr...
    Azer Bestavros, Assaf J. Kfoury, Andrei Lapets, Mi...
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    SIAMIS
    2010
    283views more  SIAMIS 2010»
    A General Framework for a Class of First Order Primal-Dual Algorithms for Convex Optimization in Imaging Science
    13 years 4 months ago
    A General Framework for a Class of First Order Primal-Dual Algorithms for Convex Optimization in Imaging Science
    Download  www.math.uci.edu
    We generalize the primal-dual hybrid gradient (PDHG) algorithm proposed by Zhu and Chan in [M. Zhu, and T. F. Chan, An Efficient Primal-Dual Hybrid Gradient Algorithm for Total Var...
    Ernie Esser, Xiaoqun Zhang, Tony F. Chan
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    DSD
    2007
    IEEE
    88views Hardware» more  DSD 2007»
    An Implementation of an Address Generator Using Hash Memories
    14 years 4 months ago
    An Implementation of an Address Generator Using Hash Memories
    Download  www.lsi-cad.com
    An address generator produces a unique address from 1 to k for the input that matches to one of k registered vectors, and produces 0 for other inputs. This paper presents the supe...
    Tsutomu Sasao, Munehiro Matsuura
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