155 search results - page 6 / 31 » ITOP: integrating timing optimization within placement |
FPGA
2004
ACM
13 years 11 months ago
2004
ACM
This paper presents a new approach to timing optimization for FPGA designs, namely incremental physical resynthesis, to answer the challenge of effectively integrating logic and p...
COMPGEOM
2007
ACM
13 years 11 months ago
2007
ACM
We consider the problem of placing a small number of angle guards inside a simple polygon P so as to provide efficient proofs that any given point is inside P. Each angle guard vi...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Thermal problems and limitations on interlayer via densities are important design constraints on three-dimensional integrated circuits (3D ICs), and need to be considered during g...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
I/O placement has always been a concern in modern IC design. Due to flip-chip technology, I/O can be placed throughout the whole chip without long wires from the periphery of the...
FPGA
2010
ACM
14 years 4 months ago
2010
ACM
Deep submicron processes have allowed FPGAs to grow in complexity and speed. However, such technology scaling has caused FPGAs to become more susceptible to the effects of process...