124 search results - page 23 / 25 » IXM2: A Parallel Associative Processor |
CLUSTER
2002
IEEE
13 years 7 months ago
2002
IEEE
Distributed systems based on cluster of workstation are more and more difficult to manage due to the increasing number of processors involved, and the complexity of associated appl...
AINA
2009
IEEE
14 years 2 months ago
2009
IEEE
The architectures which support modern supercomputing machinery are as diverse today, as at any point during the last twenty years. The variety of processor core arrangements, thr...
SC
2005
ACM
14 years 1 months ago
2005
ACM
The last decade has witnessed a rapid proliferation of superscalar cache-based microprocessors to build high-end computing (HEC) platforms, primarily because of their generality, ...
ICS
2003
Tsinghua U.
14 years 21 days ago
2003
Tsinghua U.
Cache behavior modeling is an important part of modern optimizing compilers. In this paper we present a method to estimate the number of cache misses, at compile time, using a mac...
TC
2008
13 years 7 months ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...