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» Identifying Conditional Causal Effects
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VTS
2002
IEEE
121views Hardware» more  VTS 2002»
14 years 1 months ago
Very Low Voltage Testing of SOI Integrated Circuits
Very Low Voltage (VLV) testing has been proposed to increase flaw detection in bulk silicon CMOS integrated circuits and this paper explores these and additional advantages in the...
Eric MacDonald, Nur A. Touba
RTSS
1999
IEEE
14 years 24 days ago
Timing Anomalies in Dynamically Scheduled Microprocessors
Previous timing analysis methods have assumed that the worst-case instruction execution time necessarily corresponds to the worst-case behavior. We show that this assumption is wr...
Thomas Lundqvist, Per Stenström
MICRO
1998
IEEE
139views Hardware» more  MICRO 1998»
14 years 23 days ago
Better Global Scheduling Using Path Profiles
Path profiles record the frequencies of execution paths through a program. Until now, the best global instruction schedulers have relied upon profile-gathered frequencies of condi...
Cliff Young, Michael D. Smith
GLOBECOM
2009
IEEE
14 years 12 days ago
Detecting Identity Spoofs in IEEE 802.11e Wireless Networks
Abstract--Wireless networks are vulnerable to identity spoofing attacks, where an attacker can forge the MAC address of his wireless device to assume the identity of another victim...
Gayathri Chandrasekaran, John-Austen Francisco, Vi...
CSB
2004
IEEE
136views Bioinformatics» more  CSB 2004»
14 years 8 days ago
Minimum Entropy Clustering and Applications to Gene Expression Analysis
Clustering is a common methodology for analyzing the gene expression data. In this paper, we present a new clustering algorithm from an information-theoretic point of view. First,...
Haifeng Li, Keshu Zhang, Tao Jiang