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IEEEPACT
2005
IEEE
14 years 1 months ago
Characterization of TCC on Chip-Multiprocessors
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi...
VEE
2009
ACM
130views Virtualization» more  VEE 2009»
14 years 10 days ago
Post-copy based live virtual machine migration using adaptive pre-paging and dynamic self-ballooning
We present the design, implementation, and evaluation of post-copy based live migration for virtual machines (VMs) across a Gigabit LAN. Live migration is an indispensable feature...
Michael R. Hines, Kartik Gopalan
HOTI
2005
IEEE
14 years 1 months ago
Design of Randomized Multichannel Packet Storage for High Performance Routers
High performance routers require substantial amounts of memory to store packets awaiting transmission, requiring the use of dedicated memory devices with the density and capacity ...
Sailesh Kumar, Patrick Crowley, Jonathan S. Turner
ISQED
2003
IEEE
113views Hardware» more  ISQED 2003»
14 years 29 days ago
Using Integer Equations for High Level Formal Verification Property Checking
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
Bijan Alizadeh, Mohammad Reza Kakoee
MICRO
2011
IEEE
407views Hardware» more  MICRO 2011»
13 years 2 months ago
Thread Cluster Memory Scheduling
In a modern chip-multiprocessor system, memory is a shared resource among multiple concurrently executing threads. The memory scheduling algorithm should resolve memory contention...
Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor H...