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RTAS
1997
IEEE
14 years 3 days ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
PPOPP
1997
ACM
14 years 3 days ago
Performance Implications of Communication Mechanisms in All-Software Global Address Space Systems
Global addressing of shared data simplifies parallel programming and complements message passing models commonly found in distributed memory machines. A number of programming sys...
Beng-Hong Lim, Chi-Chao Chang, Grzegorz Czajkowski...
ECBS
1996
IEEE
93views Hardware» more  ECBS 1996»
14 years 2 days ago
A Methodology for Designing and Dimensioning Critical Complex Computing Systems
It is widely recognized that real-time,fault-tolerant and distributed computing technologies play a key role in the deployment of many current andfuture (civilian or Defense) crit...
Gérard Le Lann
EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
14 years 1 days ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko
ADB
1994
311views Database» more  ADB 1994»
14 years 15 hour ago
A Personal and Portable Database Server: the CQL Card
Database applications and technologies are of central importance in many information systems a person may encounter. To obtain services, the end-users are required a smart card (pl...
Pierre Paradinas, Jean-Jacques Vandewalle
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