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» Implementation of a SliM Array Processor
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FCCM
2004
IEEE
91views VLSI» more  FCCM 2004»
13 years 11 months ago
An FPGA Interpolation Processor for Soft-Decision Reed-Solomon Decoding
We propose a parallel architecture for implementing the interpolation step in the Koetter-Vardy soft-decision ReedSolomon decoding algorithm. The key feature is the embedding of b...
Warren J. Gross, Frank R. Kschischang, P. Glenn Gu...
IPPS
1998
IEEE
13 years 11 months ago
A Parallel Algorithm for Minimum Cost Path Computation on Polymorphic Processor Array
This paper describes a new parallel algorithm for Minimum Cost Path computation on the Polymorphic Processor Array, a massively parallel architecture based on a reconfigurable mesh...
Pierpaolo Baglietto, Massimo Maresca, Mauro Miglia...
CF
2005
ACM
13 years 9 months ago
Marching-pixels: a new organic computing paradigm for smart sensor processor arrays
In this paper we present a new organic computing principle denoted as marching pixels for the architectures of future smart CMOS camera chips. The idea of marching pixels is based...
Dietmar Fey, Daniel Schmidt 0003
ACSC
2009
IEEE
14 years 2 months ago
Fast and Compact Hash Tables for Integer Keys
A hash table is a fundamental data structure in computer science that can offer rapid storage and retrieval of data. A leading implementation for string keys is the cacheconscious...
Nikolas Askitis
IPPS
1998
IEEE
13 years 11 months ago
Processor Lower Bound Formulas for Array Computations and Parametric Diophantine Systems
Using a directed acyclic graph (dag) model of algorithms, we solve a problem related to precedenceconstrained multiprocessor schedules for array computations: Given a sequence of ...
Peter R. Cappello, Ömer Egecioglu