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» Implementing Optimizations at Decode Time
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ISCA
1995
IEEE
110views Hardware» more  ISCA 1995»
13 years 11 months ago
Optimization of Instruction Fetch Mechanisms for High Issue Rates
Recent superscalar processors issue four instructions per cycle. These processors are also powered by highly-parallel superscalar cores. The potential performance can only be expl...
Thomas M. Conte, Kishore N. Menezes, Patrick M. Mi...
INFOCOM
2005
IEEE
14 years 1 months ago
Minimum energy accumulative routing in wireless networks
— In this paper, we propose to address the energy efficient routing problem in multi-hop wireless networks with accumulative relay. In the accumulative relay model, partially ov...
Jiangzhuo Chen, Lujun Jia, Xin Liu, Guevara Noubir...
QSHINE
2005
IEEE
14 years 1 months ago
Retransmission Strategies for Wireless Connections with Resource-Limited Devices
Protocols designed to provide error-free communications over lossy links, at both data link and transport layers, commonly employ the idea of sliding windows, which is based on th...
Lavy Libman
IJCV
2007
179views more  IJCV 2007»
13 years 8 months ago
A Performance Study on Different Cost Aggregation Approaches Used in Real-Time Stereo Matching
Many vision applications require high-accuracy dense disparity maps in real-time and online. Due to time constraint, most real-time stereo applications rely on local winner-takes-a...
Minglun Gong, Ruigang Yang, Liang Wang 0002, Mingw...
ISCAS
2008
IEEE
173views Hardware» more  ISCAS 2008»
14 years 2 months ago
Analysis of video filtering on the cell processor
— In this paper an analysis of bi-dimensional video filtering on the Cell Broadband Engine Processor is presented. To evaluate the processor, a highly adaptive filtering algori...
Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurli...