5562 search results - page 98 / 1113 » Implementing Parallel Cell-DEVS |
136
Voted
IEEEPACT
2005
IEEE
15 years 8 months ago
2005
IEEE
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
125
click to vote
ICCS
2004
Springer
15 years 8 months ago
2004
Springer
On cc-NUMA multi-processors, the non-uniformity of main memory latencies motivates the need for co-location of threads and data. We call this special form of data locality, geogra...
110
Voted
IPPS
2003
IEEE
15 years 8 months ago
2003
IEEE
System on Devices (SyD) is a specification for a middleware to enable heterogeneous collections of information, databases, or devices (such as hand-held devices) to collaborate wi...
139
Voted
ARCS
2008
Springer
15 years 4 months ago
2008
Springer
: The architecture of the IBM Cell BE processor represents a new approach for designing CPUs. The fast execution of legacy software has to stand back in order to achieve very high ...
115
Voted
ENGL
2008
15 years 2 months ago
2008
This paper presents a compact analog neuron cell incorporating an array of charge-coupled synapses connected via a common output terminal. The novel silicon synapse is based on a t...