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» Implementing Sequential Consistency in Cache-Based Systems
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APCSAC
2007
IEEE
14 years 1 months ago
Implicit Transactional Memory in Kilo-Instruction Multiprocessors
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
Marco Galluzzi, Enrique Vallejo, Adrián Cri...
VLDB
2001
ACM
149views Database» more  VLDB 2001»
13 years 12 months ago
Cache-Conscious Concurrency Control of Main-Memory Indexes on Shared-Memory Multiprocessor Systems
Recent research addressed the importance of optimizing L2 cache utilization in the design of main memory indexes and proposed the so-called cache-conscious indexes such as the CSB...
Sang Kyun Cha, Sangyong Hwang, Kihong Kim, Keunjoo...
COMCOM
2007
149views more  COMCOM 2007»
13 years 7 months ago
Cache invalidation strategies for internet-based mobile ad hoc networks
Internet-based mobile ad hoc network (IMANET) combines a mobile ad hoc network (MANET) and the Internet to provide universal information accessibility. Although caching frequently...
Sunho Lim, Wang-Chien Lee, Guohong Cao, Chita R. D...
PADS
1998
ACM
13 years 11 months ago
GloMoSim: A Library for Parallel Simulation of Large-Scale Wireless Networks
A number of library-based parallel and sequential network simulators have been designed. This paper describes a library, called GloMoSim (for Global Mobile system Simulator), for ...
Xiang Zeng, Rajive Bagrodia, Mario Gerla
IEEEPACT
2003
IEEE
14 years 23 days ago
Constraint Graph Analysis of Multithreaded Programs
This paper presents a framework for analyzing the performance of multithreaded programs using a model called a constraint graph. We review previous constraint graph definitions fo...
Harold W. Cain, Mikko H. Lipasti, Ravi Nair