857 search results - page 12 / 172 » Implementing a STARI chip |
TODAES
2011
13 years 2 months ago
2011
—In this paper, we present an attack on stream cipher implementations by determining the scan chain structure of the linear feedback shift registers in their implementations. Alt...
ISVLSI
2003
IEEE
14 years 18 days ago
2003
IEEE
In this paper, we discuss the possibility of achieving onchip fault-tolerant communication based on a new communication paradigm called stochastic communication. Specifically, for...
ICARIS
2005
Springer
14 years 26 days ago
2005
Springer
Many bio-inspired algorithms (evolutionary algorithms, artificial immune systems, particle swarm optimisation, ant colony optimisation, …) are based on populations of agents. Ste...
SBACPAD
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper, an adaptive wormhole router for a flexible on-chip interconnection network is proposed and implemented for a Chip-Multi Processor (CMP). It adopts a wormhole switc...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...