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» Implementing the scale vector-thread processor
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TODAES
2008
36views more  TODAES 2008»
13 years 10 months ago
Implementing the scale vector-thread processor
Ronny Krashinsky, Christopher Batten, Krste Asanov...
POPL
2007
ACM
14 years 11 months ago
Implementing deterministic declarative concurrency using sieves
The predominant thread-based approach to concurrent programming is bug-prone, difficult to reason about, and does not scale well to large numbers of processors. Sieves provide a s...
Sam Lindley
GI
2009
Springer
13 years 8 months ago
Implementation of an effective non-bonded interactions kernel for biomolecular simulations on the Cell processor
Abstract: In biomolecular simulations intensive computations are spent in nonbonded interactions kernels, i.e., electrostatic interactions. Therefore this part can be considered as...
Horacio Emilio Pérez Sánchez, Wolfga...
GLOBECOM
2007
IEEE
14 years 20 days ago
The Quality-Energy Scalable OFDMA Modulation for Low Power Transmitter and VLIW Processor Based Implementation
: The improvement of spectral efficiency comes at the cost of exponential increment of signal processing complexity [1]. Hence, the energy-efficiency of baseband has recently turne...
Min Li, Bruno Bougard, Eduardo Lopez-Estraviz, And...
RTAS
2005
IEEE
14 years 4 months ago
VPN Gateways over Network Processors: Implementation and Evaluation
Networking applications, such as VPN and content filtering, demand extra computing power in order to meet the throughput requirement nowadays. In addition to pure ASIC solutions, ...
Yi-Neng Lin, Chiuan-Hung Lin, Ying-Dar Lin, Yuan-C...