244 search results - page 39 / 49 » Implementing the scale vector-thread processor |
HPDC
1997
IEEE
13 years 11 months ago
1997
IEEE
This paper presents a novel networking architecture designed for communication intensive parallel applications running on clusters of workstations (COWs) connected by highspeed ne...
VLSISP
2011
13 years 2 months ago
2011
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
ASPLOS
2011
ACM
12 years 11 months ago
2011
ACM
nt, user-defined objects present an attractive abstraction for working with non-volatile program state. However, the slow speed of persistent storage (i.e., disk) has restricted ...
PPOPP
2010
ACM
14 years 4 months ago
2010
ACM
Drawing inspiration from several previous projects, we present an ownership-record-free software transactional memory (STM) system that combines extremely low overhead with unusua...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
In our research project named “Mega-Scale Computing Based on Low-Power Technology and Workload Modeling”, we have been developing a prototype cluster not based on ASIC or FPGA...