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» Improvement of ASIC Design Processes
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IPPS
2010
IEEE
13 years 6 months ago
Tile QR factorization with parallel panel processing for multicore architectures
To exploit the potential of multicore architectures, recent dense linear algebra libraries have used tile algorithms, which consist in scheduling a Directed Acyclic Graph (DAG) of...
Bilel Hadri, Hatem Ltaief, Emmanuel Agullo, Jack D...
JMLR
2010
184views more  JMLR 2010»
13 years 3 months ago
Sequential Monte Carlo Samplers for Dirichlet Process Mixtures
In this paper, we develop a novel online algorithm based on the Sequential Monte Carlo (SMC) samplers framework for posterior inference in Dirichlet Process Mixtures (DPM) (DelMor...
Yener Ülker, Bilge Günsel, Ali Taylan Ce...
TNN
2008
124views more  TNN 2008»
13 years 8 months ago
Just-in-Time Adaptive Classifiers - Part II: Designing the Classifier
Aging effects, environmental changes, thermal drifts, and soft and hard faults affect physical systems by changing their nature and behavior over time. To cope with a process evolu...
Cesare Alippi, Manuel Roveri
ICDE
2006
IEEE
144views Database» more  ICDE 2006»
14 years 10 months ago
Network-Aware Operator Placement for Stream-Processing Systems
To use their pool of resources efficiently, distributed stream-processing systems push query operators to nodes within the network. Currently, these operators, ranging from simple...
Peter R. Pietzuch, Jonathan Ledlie, Jeffrey Shneid...
APSEC
2002
IEEE
14 years 1 months ago
Using Process Simulation to Compare Scheduling Strategies for Software Projects
We present a discrete simulation model for software projects which explicitly takes a scheduling strategy as input. The model represents varying staff skill levels, component coup...
Frank Padberg