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GLVLSI
2007
IEEE
177views VLSI» more  GLVLSI 2007»
14 years 5 months ago
Improvements for constraint solving in the systemc verification library
Daniel Große, Rüdiger Ebendt, Rolf Drec...
SIES
2010
IEEE
13 years 8 months ago
Verification of a CAN bus model in SystemC with functional coverage
Abstract--Many heterogeneous embedded systems, for example industrial automation and automotive applications, require hard-real time constraints to be exhaustively verified - which...
Christoph Kuznik, Gilles B. Defo, Wolfgang Mü...
DATE
2002
IEEE
105views Hardware» more  DATE 2002»
14 years 3 months ago
Functional Verification for SystemC Descriptions Using Constraint Solving
Fabrizio Ferrandi, Michele Rendine, Donatella Sciu...
DT
2006
180views more  DT 2006»
13 years 11 months ago
A SystemC Refinement Methodology for Embedded Software
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
Jérôme Chevalier, Maxime de Nanclas, ...
CODES
2007
IEEE
14 years 2 months ago
A computational reflection mechanism to support platform debugging in SystemC
System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity...
Bruno Albertini, Sandro Rigo, Guido Araujo, Cristi...