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SIGMOD
2010
ACM
207views Database» more  SIGMOD 2010»
13 years 7 months ago
Leveraging spatio-temporal redundancy for RFID data cleansing
Radio Frequency Identification (RFID) technologies are used in many applications for data collection. However, raw RFID readings are usually of low quality and may contain many an...
Haiquan Chen, Wei-Shinn Ku, Haixun Wang, Min-Te Su...
CASES
2001
ACM
13 years 11 months ago
A system-on-a-chip lock cache with task preemption support
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
Bilge Saglam Akgul, Jaehwan Lee, Vincent John Moon...
CC
2008
Springer
193views System Software» more  CC 2008»
13 years 9 months ago
Automatic Transformations for Communication-Minimized Parallelization and Locality Optimization in the Polyhedral Model
The polyhedral model provides powerful abstractions to optimize loop nests with regular accesses. Affine transformations in this model capture a complex sequence of execution-reord...
Uday Bondhugula, Muthu Manikandan Baskaran, Sriram...
RTSS
2006
IEEE
14 years 1 months ago
Tightening the Bounds on Feasible Preemption Points
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
ISPDC
2010
IEEE
13 years 6 months ago
Resource-Aware Compiler Prefetching for Many-Cores
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
George C. Caragea, Alexandros Tzannes, Fuat Keceli...