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CODES
2004
IEEE
14 years 14 days ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
CF
2005
ACM
13 years 10 months ago
Evaluation of extended dictionary-based static code compression schemes
This paper evaluates how much extended dictionary-based code compression techniques can reduce the static code size. In their simplest form, such methods statically identify ident...
Martin Thuresson, Per Stenström
DAC
2008
ACM
13 years 10 months ago
Application mapping for chip multiprocessors
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
Guangyu Chen, Feihui Li, Seung Woo Son, Mahmut T. ...
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
14 years 3 months ago
Tradeoffs in designing accelerator architectures for visual computing
Visualization, interaction, and simulation (VIS) constitute a class of applications that is growing in importance. This class includes applications such as graphics rendering, vid...
Aqeel Mahesri, Daniel R. Johnson, Neal C. Crago, S...
BIBM
2007
IEEE
132views Bioinformatics» more  BIBM 2007»
14 years 3 months ago
A Divide-and-Conquer Implementation of Three Sequence Alignment and Ancestor Inference
In this paper, we present an algorithm to simultaneously align three biological sequences with affine gap model and infer their common ancestral sequence. Our algorithm can be fu...
Feng Yue, Jijun Tang