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ISCA
1997
IEEE
96views Hardware» more  ISCA 1997»
13 years 12 months ago
DataScalar Architectures
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory....
Doug Burger, Stefanos Kaxiras, James R. Goodman
ICCS
2009
Springer
14 years 2 months ago
Evaluation of Hierarchical Mesh Reorderings
Irregular and sparse scientific computing programs frequently experience performance losses due to inefficient use of the memory system in most machines. Previous work has shown t...
Michelle Mills Strout, Nissa Osheim, Dave Rostron,...
CVPR
2010
IEEE
14 years 4 months ago
Supervised Translation-Invariant Sparse Coding
In this paper, we propose a novel supervised hierarchical sparse coding model based on local image descriptors for classification tasks. The supervised dictionary training is perf...
Jianchao Yang, Kai Yu, Thomas Huang
KDD
2009
ACM
249views Data Mining» more  KDD 2009»
14 years 8 months ago
Drosophila gene expression pattern annotation using sparse features and term-term interactions
The Drosophila gene expression pattern images document the spatial and temporal dynamics of gene expression and they are valuable tools for explicating the gene functions, interac...
Shuiwang Ji, Lei Yuan, Ying-Xin Li, Zhi-Hua Zhou, ...
RTAS
2010
IEEE
13 years 6 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean