19 search results - page 3 / 4 » Improving NFA-Based Signature Matching Using Ordered Binary ... |
ICCD
1995
IEEE
13 years 11 months ago
1995
IEEE
– This paper describes a new technique for extracting clock-level finite state machines(FSMs) from transistor netlists using symbolic simulation. The transistor netlist is prepr...
FMSD
2007
13 years 7 months ago
2007
Symbolic techniques based on Binary Decision Diagrams (BDDs) are widely employed for reasoning about temporal properties of hardware circuits and synchronous controllers. However, ...
QEST
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--Model checkers for concurrent probabilistic systems have become very popular within the last decade. The study of long-run average behavior has however received only scan...
CAV
2010
Springer
13 years 11 months ago
2010
Springer
Abstract. Synthesis of finite state systems from full linear time temporal logic (LTL) specifications is gaining more and more attention as several recent achievements have signi...
CGO
2010
IEEE
14 years 2 months ago
2010
IEEE
Prior work has shown that reduced, ordered, binary decision diagrams (BDDs) can be a powerful tool for program trace analysis and visualization. Unfortunately, it can take hours o...