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CODES
2008
IEEE
14 years 2 months ago
Don't forget memories: a case study redesigning a pattern counting ASIC circuit for FPGAs
Modern embedded compute platforms increasingly contain both microprocessors and field-programmable gate arrays (FPGAs). The FPGAs may implement accelerators or other circuits to s...
David Sheldon, Frank Vahid
IOPADS
1996
100views more  IOPADS 1996»
13 years 9 months ago
ENWRICH a Compute-Processor Write Caching Scheme for Parallel File Systems
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been able to keep up with substantial improvements in p...
Apratim Purakayastha, Carla Schlatter Ellis, David...
MEMOCODE
2010
IEEE
13 years 5 months ago
Proving transaction and system-level properties of untimed SystemC TLM designs
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
Daniel Große, Hoang M. Le, Rolf Drechsler
ANCS
2009
ACM
13 years 5 months ago
Range Tries for scalable address lookup
In this paper we introduce the Range Trie, a new multiway tree data structure for address lookup. Each Range Trie node maps to an address range [Na, Nb) and performs multiple comp...
Ioannis Sourdis, Georgios Stefanakis, Ruben de Sme...
TMM
2011
169views more  TMM 2011»
13 years 2 months ago
Empowering Visual Categorization With the GPU
—Visual categorization is important to manage large collections of digital images and video, where textual metadata is often incomplete or simply unavailable. The bag-of-words mo...
Koen E. A. van de Sande, Theo Gevers, Cees G. M. S...