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SBACPAD
2007
IEEE
143views Hardware» more  SBACPAD 2007»
14 years 2 months ago
A Code Compression Method to Cope with Security Hardware Overheads
Code Compression has been used to alleviate the memory requirements as well as to improve performance and/or minimize energy consumption. On the other hand, implementing security ...
Eduardo Wanderley Netto, Romain Vaslin, Guy Gognia...
SC
2003
ACM
14 years 1 months ago
Scalable Hardware-Based Multicast Trees
This paper presents an algorithm for implementing optimal hardware-based multicast trees, on networks that provide hardware support for collective communication. Although the prop...
Salvador Coll, José Duato, Fabrizio Petrini...
COMPGEOM
2000
ACM
14 years 1 months ago
Fast computation of generalized Voronoi diagrams using graphics hardware
: We present a new approach for computing generalized Voronoi diagrams in two and three dimensions using interpolation-based polygon rasterization hardware. The input primitives ma...
Kenneth E. Hoff III, Tim Culver, John Keyser, Ming...
JSAC
2008
124views more  JSAC 2008»
13 years 8 months ago
Design Tradeoffs and Hardware Architecture for Real-Time Iterative MIMO Detection using Sphere Decoding and LDPC Coding
Abstract-- We explore the performance and hardware complexity tradeoffs associated with performing iterative multipleinput multiple-output (MIMO) detection using a sphere decoder a...
Hyungjin Kim, Dong-U Lee, John D. Villasenor
VLSID
2005
IEEE
157views VLSI» more  VLSID 2005»
14 years 9 months ago
Energy Efficient Hardware Synthesis of Polynomial Expressions
Polynomial expressions are used to approximate a wide variety of functions commonly found in signal processing and computer graphics applications. Computing these polynomial expre...
Anup Hosangadi, Farzan Fallah, Ryan Kastner