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» Improving Testing Efficiency using Cumulative Test Analysis
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EURODAC
1994
IEEE
145views VHDL» more  EURODAC 1994»
13 years 11 months ago
Testability analysis and improvement from VHDL behavioral specifications
This paper presents a testability improvement method for digital systems described in VHDL behavioral specification. The method is based on testability analysis at registertransfe...
Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
SIGADA
2001
Springer
13 years 12 months ago
Automating software module testing for FAA certification
Automatic software testing is gradually becoming accepted practice in the software industry. The shrinking development cycle and higher expectation of software quality are forcing...
Usha Santhanam
DATE
2003
IEEE
135views Hardware» more  DATE 2003»
14 years 25 days ago
Creating Value Through Test
Test is often seen as a necessary evil; it is a fact of life that ICs have manufacturing defects and those need to be filtered out by testing before the ICs are shipped to the cu...
Erik Jan Marinissen, Bart Vermeulen, Robert Madge,...
ENGL
2007
88views more  ENGL 2007»
13 years 7 months ago
Computer Simulated Tests for Lever Controls with Circular Displays
— Using computer simulated tests, this study examined direction-of-motion stereotypes and response times for different configurations of lever controls and circular displays. Qua...
W. H. Chan, Alan H. S. Chan
ITC
1997
IEEE
129views Hardware» more  ITC 1997»
13 years 11 months ago
On Using Machine Learning for Logic BIST
This paper presents a new approach for designing test sequences to be generated on–chip. The proposed technique is based on machine learning, and provides a way to generate effi...
Christophe Fagot, Patrick Girard, Christian Landra...