This paper addresses not only the question of testability measurement of OO designs but also focuses on its practicability. While detecting testability weaknesses (called testabil...
There is a critical need for approaches to support software testing. Our research exploits the information described at Architectural Patterns to drive the definition of tests. As...
This paper presents a testability improvement method for digital systems described in VHDL behavioral specification. The method is based on testability analysis at registertransfe...
We propose a methodology for applying gate-level logic transformations to optimize power in digital circuits. Statistically simulated[14] switching information, gate delays, signa...
State elements are increasingly vulnerable to soft errors due to their decreasing size, and the fact that latched errors cannot be completely eliminated by electrical or timing ma...