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CASES
2010
ACM
13 years 6 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
IPPS
1998
IEEE
14 years 29 days ago
Memory Hierarchy Management for Iterative Graph Structures
The increasing gap in processor and memory speeds has forced microprocessors to rely on deep cache hierarchies to keep the processors from starving for data. For many applications...
Ibraheem Al-Furaih, Sanjay Ranka
CGO
2003
IEEE
14 years 11 days ago
METRIC: Tracking Down Inefficiencies in the Memory Hierarchy via Binary Rewriting
In this paper, we present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applicatio...
Jaydeep Marathe, Frank Mueller, Tushar Mohan, Bron...
VLDB
1999
ACM
174views Database» more  VLDB 1999»
14 years 29 days ago
Extending Practical Pre-Aggregation in On-Line Analytical Processing
On-Line Analytical Processing (OLAP) based on a dimensional view of data is being used increasingly for the purpose of analyzing very large amounts of data. To improve query perfo...
Torben Bach Pedersen, Christian S. Jensen, Curtis ...
ISPASS
2007
IEEE
14 years 3 months ago
Accelerating Full-System Simulation through Characterizing and Predicting Operating System Performance
The ongoing trend of increasing computer hardware and software complexity has resulted in the increase in complexity and overheads of cycle-accurate processor system simulation, e...
Seongbeom Kim, Fang Liu, Yan Solihin, Ravi R. Iyer...