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ASPDAC
2009
ACM
155views Hardware» more  ASPDAC 2009»
14 years 2 months ago
Variation-aware resource sharing and binding in behavioral synthesis
— As technology scales, the delay uncertainty caused by process variations has become increasingly pronounced in deep submicron designs. In the presence of process variations, wo...
Feng Wang 0004, Yuan Xie, Andres Takach
CONEXT
2006
ACM
14 years 1 months ago
Shortcuts in a virtual world
We consider the case of a virtual world of peers that are organized in an overlay built by Delaunay Triangulation. Application layer routing is used to determine the path taken in...
Moritz Steiner, Ernst W. Biersack
ICC
2007
IEEE
173views Communications» more  ICC 2007»
14 years 2 months ago
Virtual Topology Design for OBS Optical Networks
—Burst loss and delay are two main issues in optical hop-count. Network diameter is the hop-count of the shortest burst switching (OBS) networks. In OBS, if the hop-count path be...
Bin Wu, Kwan Lawrence Yeung
DAC
2004
ACM
14 years 8 months ago
Profile-guided microarchitectural floorplanning for deep submicron processor design
As process technology migrates to deep submicron with feature size less than 100nm, global wire delay is becoming a major hindrance in keeping the latency of intra-chip communicat...
Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watew...
MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
14 years 1 months ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang