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ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
11 years 10 months ago
BlockChop: Dynamic squash elimination for hybrid processor architecture
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
Jason Mars, Naveen Kumar
PVLDB
2010
184views more  PVLDB 2010»
13 years 6 months ago
Adaptive Logging for Mobile Device
Nowadays, due to the increased user requirements of the fast and reliable data management operation for mobile applications, major device vendors use embedded DBMS for their mobil...
Young-Seok Kim, Heegyu Jin, Kyoung-Gu Woo
MICRO
1998
IEEE
139views Hardware» more  MICRO 1998»
14 years 5 days ago
Better Global Scheduling Using Path Profiles
Path profiles record the frequencies of execution paths through a program. Until now, the best global instruction schedulers have relied upon profile-gathered frequencies of condi...
Cliff Young, Michael D. Smith
HPDC
2008
IEEE
14 years 2 months ago
XenLoop: a transparent high performance inter-vm network loopback
Advances in virtualization technology have focused mainly on strengthening the isolation barrier between virtual machines (VMs) that are co-resident within a single physical machi...
Jian Wang, Kwame-Lante Wright, Kartik Gopalan
EKNOW
2009
13 years 5 months ago
The Method for a Summarization of Product Reviews Using the User's Opinion
As the number of transactions in E-market places is growing, more and more product information and product reviews are posted on the Internet. Because customers want to purchase go...
Jung-Yeon Yang, Jaeseok Myung, Sang-goo Lee