2101 search results - page 34 / 421 » Improving the performance of DSP systems for MIMO processing |
HIPC
2000
Springer
13 years 11 months ago
2000
Springer
Embedded systems consisting of the application program ROM, RAM, the embedded processor core and any custom hardware on a single wafer are becoming increasingly common in areas suc...
ICC
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper, we are concerned with a two-hop multi-input-multi-output (MIMO) amplify-andforward (AF) relay system consisting of a source node (SN), a relay node (RN), and a dest...
PLDI
2003
ACM
14 years 18 days ago
2003
ACM
As more complex DSP algorithms are realized in practice, an increasing need for high-level stream abstractions that can be compiled without sacrificing efficiency. Toward this en...
PIMRC
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--This paper investigates throughput-efficient relay ARQ protocols for single carrier MIMO systems with amplify-and-forward relaying. We focus on reducing the multiplexing ...
ICASSP
2008
IEEE
14 years 1 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...