A new method for predicting timing jitter caused by device noise in current-mode logic (CML) frequency dividers is presented. Device noise transformation into jitter is modeled as ...
Marko Aleksic, Nikola Nedovic, K. Wayne Current, V...
— Accurate simulation and analysis of wireless protocols and systems is inherently dependent on an accurate model of the underlying channel. In this paper, we show that residual ...
— In the standard approach to studying connectivity, a physical layer is assumed that allows direct transmission between neighbors within some fixed distance. The graph resultin...
A self-organizing neural network for learning and recall of complex temporal sequences is proposed. we consider a single sequence with repeated items, or several sequences with a c...
—Carrier Sense Multiple Access (CSMA) protocols in Multi-hop Wireless Networks (MHWN) are known to suffer from different forms of the hidden and exposed terminal problems, leadin...