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DSD
2008
IEEE
147views Hardware» more  DSD 2008»
13 years 9 months ago
A Low-Cost Cache Coherence Verification Method for Snooping Systems
Due to modern technology trends such as decreasing feature sizes and lower voltage levels, fault tolerance is becoming increasingly important in computing systems. Shared memory i...
Demid Borodin, Ben H. H. Juurlink
TC
1998
13 years 7 months ago
Design Verification of the S3.mp Cache-Coherent Shared-Memory System
—This paper describes the methods used to formulate and validate the memory subsystem of the cache-coherent Sun Scalable emory MultiProcessor (S3.mp) at three levels of abstracti...
Fong Pong, Michael C. Browne, Gunes Aybay, Andreas...
ICPP
2007
IEEE
14 years 1 months ago
Integrating Memory Compression and Decompression with Coherence Protocols in Distributed Shared Memory Multiprocessors
Ever-increasing memory footprint of applications and increasing mainstream popularity of shared memory parallel computing motivate us to explore memory compression potential in di...
Lakshmana Rao Vittanala, Mainak Chaudhuri
CAL
2010
13 years 4 months ago
SMT-Directory: Efficient Load-Load Ordering for SMT
Memory models like SC, TSO, and PC enforce load-load ordering, requiring that loads from any single thread appear to occur in program order to all other threads. Out-of-order execu...
A. Hilton, A. Roth
ASPLOS
2004
ACM
14 years 1 months ago
Coherence decoupling: making use of incoherence
This paper explores a new technique called coherence decoupling, which breaks a traditional cache coherence protocol into two protocols: a Speculative Cache Lookup (SCL) protocol ...
Jaehyuk Huh, Jichuan Chang, Doug Burger, Gurindar ...