157 search results - page 9 / 32 » Incremental Compilation-to-SAT Procedures |
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
This paper presents a new approach to timing optimization for FPGA designs, namely incremental physical resynthesis, to answer the challenge of effectively integrating logic and p...
ERSA
2004
13 years 11 months ago
2004
Delay budget is an excess delay that each component of a design can tolerate under a given timing constraint. Delay budgeting has been widely exploited to improve the design quali...
IJCNN
2008
IEEE
14 years 4 months ago
2008
IEEE
— A major challenge in applying machine learning methods to Brain-Computer Interfaces (BCIs) is to overcome the on-line non-stationarity of the data blocks. An effective BCI syst...
IBPRIA
2003
Springer
14 years 3 months ago
2003
Springer
We present a procedure for tracking a rigid object based on a piecewise planar model, and show how it can be used to track a human face. The tracking is performed using a single in...
SNPD
2008
13 years 11 months ago
2008
The selective application of technological and related procedural safeguards is an important responsibility of every organization in providing adequate security to its electronic ...