86 search results - page 7 / 18 » Incremental compilation for parallel logic verification syst... |
COORDINATION
2009
Springer
14 years 8 months ago
2009
Springer
Process algebras are a set of mathematically rigourous languages with well defined semantics that permit modelling behaviour of concurrent and communicating systems. Verification o...
BIRTHDAY
2010
Springer
13 years 7 months ago
2010
Springer
Abstract. The error-prone process of formal specification and verification of large systems requires an efficient, evolutionary formal development approach. Development graphs have...
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper we describe a compiler framework which can identify communication patterns for MPIbased parallel applications. This has the potential of providing significant perfo...
PADL
2009
Springer
14 years 8 months ago
2009
Springer
Abstract. In this paper, we present our initial design and implementation of a declarative network verifier (DNV). DNV utilizes theorem proving, a well established verification tec...