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» Incremental formal design verification
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POPL
2003
ACM
14 years 7 months ago
Toward a foundational typed assembly language
We present the design of a typed assembly language called TALT that supports heterogeneous tuples, disjoint sums, and a general account of addressing modes. TALT also implements t...
Karl Crary
DSN
2004
IEEE
13 years 11 months ago
Assured Reconfiguration of Embedded Real-Time Software
It is often the case that safety-critical systems have to be reconfigured during operation because of issues such as changes in the system's operating environment or the fail...
Elisabeth A. Strunk, John C. Knight
INFSOF
2006
158views more  INFSOF 2006»
13 years 7 months ago
DEVSpecL: DEVS specification language for modeling, simulation and analysis of discrete event systems
Discrete EVent Systems Specification (DEVS) formalism supports specification of discrete event models in a hierarchical modular manner. This paper proposes a DEVS modeling languag...
Ki Jung Hong, Tag Gon Kim
SAC
2006
ACM
13 years 7 months ago
Transformation of B specifications into UML class diagrams and state machines
We propose a rule-based approach for transforming B abstract machines into UML diagrams. We believe that important insight into the structure underlying a B model can be gained by...
Houda Fekih, Leila Jemni Ben Ayed, Stephan Merz
INFORMATICALT
2002
103views more  INFORMATICALT 2002»
13 years 7 months ago
Numerical Representations as Purely Functional Data Structures: a New Approach
This paper is concerned with design, implementation and verification of persistent purely functional data structures which are motivated by the representation of natural numbers us...
Mirjana Ivanovic, Viktor Kuncak