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» Incremental formal design verification
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FMCAD
2006
Springer
13 years 11 months ago
Ario: A Linear Integer Arithmetic Logic Solver
Ario is a solver for systems of linear integer arithmetic logic. Such systems are commonly used in design verification applications and are classified under Satisfiability Modulo T...
Hossein M. Sheini, Karem A. Sakallah
FMICS
2006
Springer
13 years 11 months ago
Can Saturation Be Parallelised?
Abstract. Symbolic state-space generators are notoriously hard to parallelise. However, the Saturation algorithm implemented in the SMART verification tool differs from other seque...
Jonathan Ezekiel, Gerald Lüttgen, Radu Simini...
FMICS
2010
Springer
13 years 8 months ago
Model Checking the FlexRay Physical Layer Protocol
Abstract. The FlexRay standard, developed by a cooperation of leading companies in the automotive industry, is a robust communication protocol for distributed components in modern ...
Michael Gerke 0002, Rüdiger Ehlers, Bernd Fin...
FORMATS
2010
Springer
13 years 5 months ago
Layered Composition for Timed Automata
Abstract. We investigate layered composition for real-time systems modelled as (networks of) timed automata (TA). We first formulate the principles of layering and transition indep...
Ernst-Rüdiger Olderog, Mani Swaminathan
CAV
2009
Springer
136views Hardware» more  CAV 2009»
14 years 8 months ago
Intra-module Inference
Abstract. Contract-based property checkers hold the potential for precise, scalable, and incremental reasoning. However, it is difficult to apply such checkers to large program mod...
Shuvendu K. Lahiri, Shaz Qadeer, Juan P. Galeotti,...