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» Incremental formal design verification
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ITICSE
2003
ACM
14 years 19 days ago
Studying program correctness by constructing contracts
Because the concept of program correctness is generally taught as an activity independent of the programming process, most introductory computer science (CS) students perceive it ...
Timothy S. Gegg-Harrison, Gary R. Bunce, Rebecca D...
HYBRID
2010
Springer
13 years 9 months ago
Receding horizon control for temporal logic specifications
In this paper, we describe a receding horizon scheme that satisfies a class of linear temporal logic specifications sufficient to describe a wide range of properties including saf...
Tichakorn Wongpiromsarn, Ufuk Topcu, Richard M. Mu...
IFIP
2001
Springer
13 years 11 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre
ICFP
2010
ACM
13 years 8 months ago
VeriML: typed computation of logical terms inside a language with effects
Modern proof assistants such as Coq and Isabelle provide high degrees of expressiveness and assurance because they support formal reasoning in higher-order logic and supply explic...
Antonis Stampoulis, Zhong Shao
DEXA
2009
Springer
124views Database» more  DEXA 2009»
14 years 1 months ago
VisiNav: Visual Web Data Search and Navigation
Semantic Web technologies facilitate data integration over a large number of sources with decentralised and loose coordination, ideally leading to interlinked datasets which descri...
Andreas Harth