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» Incremental formal design verification
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LARCH
1992
13 years 11 months ago
Using Transformations and Verification in Circuit Design
James B. Saxe, John V. Guttag, James J. Horning, S...
VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
14 years 7 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
FORTE
1994
13 years 8 months ago
Proving the value of formal methods
The record of successful applications of formal verification techniques is slowly growing. Our ultimate aim, however, is not to perform small pilot projects that show that verific...
Gerard J. Holzmann
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 7 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...