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» Incremental logic rectification
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ICST
2008
IEEE
14 years 2 months ago
Test-Driven Assessment of Access Control in Legacy Applications
If access control policy decision points are not neatly separated from the business logic of a system, the evolution of a security policy likely leads to the necessity of changing...
Yves Le Traon, Tejeddine Mouelhi, Alexander Pretsc...
FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
14 years 1 months ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose
BROADNETS
2007
IEEE
14 years 2 months ago
Resource dimensioning in WDM networks under state-based routing schemes
— Network dimensioning for wavelength-routed WDM networks has been extensively studied to maximize connection acceptance rate while minimizing the total cost. However, Internet s...
Xiaolan J. Zhang, Sun-il Kim, Steven S. Lumetta
AAAI
2008
13 years 10 months ago
Existentially Quantified Values for Queries and Updates of Facts in Transaction Logic Programs
In several applications of logic programming and Transaction Logic, such as, planning, trust management and independent Semantic Web Services, an action might produce incomplete f...
Paul Fodor
CSCLP
2007
Springer
14 years 1 months ago
Quasi-Linear-Time Algorithms by Generalisation of Union-Find in CHR
Abstract. The union-find algorithm can be seen as solving simple equations between variables or constants. With a few lines of code change, we generalise its implementation in CHR...
Thom W. Frühwirth