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RECOSOC
2007
116views Hardware» more  RECOSOC 2007»
13 years 10 months ago
IBC-EI: An Instruction Based Compression method with Encryption and Integrity Checking
Code Compression has been shown to be efficient in minimizing the memory requirements for embedded systems as well as in power consumption reduction and performance improvement. I...
Eduardo Wanderley Netto, Reouven Elbaz, Lionel Tor...
ICS
2003
Tsinghua U.
14 years 1 months ago
miNI: reducing network interface memory requirements with dynamic handle lookup
Recent work in low-latency, high-bandwidth communication systems has resulted in building user–level Network InControllers (NICs) and communication abstractions that support dir...
Reza Azimi, Angelos Bilas
ISCA
2012
IEEE
281views Hardware» more  ISCA 2012»
11 years 11 months ago
LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev B...
EDBT
2010
ACM
151views Database» more  EDBT 2010»
14 years 1 months ago
Warm cache costing: a feedback optimization technique for buffer pool aware costing
Most modern RDBMS depend on the query processing optimizer’s cost model to choose the best execution plan for a given query. Since the physical IO (PIO) is a costly operation to...
H. S. Ramanujam, Edwin Seputis
DFT
2002
IEEE
128views VLSI» more  DFT 2002»
14 years 1 months ago
Matrix-Based Test Vector Decompression Using an Embedded Processor
This paper describes a new compression/decompression methodology for using an embedded processor to test the other components of a system-on-a-chip (SoC). The deterministic test v...
Kedarnath J. Balakrishnan, Nur A. Touba