— We consider cell-based switch architectures in which the speedup of the internal switching fabric is not large enough to avoid input buffering. These architectures require a sc...
Emilio Leonardi, Marco Mellia, Marco Ajmone Marsan...
— A significant research effort has been devoted in recent years to the design of simple and efficient scheduling policies for Input Queued (IQ) and Combined Input Output Queue...
Marco Ajmone Marsan, Paolo Giaccone, Emilio Leonar...
Parallel Packet Switches (PPS) use internal, parallel switch planes that operate at less than line speed. A PPS can scale-up to faster line speeds than a single-plane switch can. ...
As the number of computing and storage nodes keeps increasing, the interconnection network is becoming a key element of many computing and communication systems, where the overall...