2784 search results - page 102 / 557 » Instruction Level Parallelism |
147
Voted
DAC
2007
ACM
16 years 3 months ago
2007
ACM
Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network a...
128
Voted
ASAP
2005
IEEE
15 years 8 months ago
2005
IEEE
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
128
Voted
EUROPAR
2003
Springer
15 years 7 months ago
2003
Springer
Hardware performance monitoring is the basis of modern performance analysis tools for application optimization. We are interested in providing such performance analysis tools for t...
106
Voted
AMAST
2008
Springer
15 years 4 months ago
2008
Springer
We demonstrate Spiral, a domain-specific library generation system. Spiral generates high performance source code for linear transforms (such as the discrete Fourier transform and ...
152
Voted
CDES
2006
15 years 4 months ago
2006
Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...